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  • 标题:Design of Multi-Channel UART Controller Based On FIFO and FPGA
  • 本地全文:下载
  • 作者:Deepchand Jaiswal ; Rita Jain ; M. Zahid Alam
  • 期刊名称:International Journal of Advanced Research in Computer Engineering & Technology (IJARCET)
  • 印刷版ISSN:2278-1323
  • 出版年度:2012
  • 卷号:1
  • 期号:4
  • 页码:419-426
  • 出版社:Shri Pannalal Research Institute of Technolgy
  • 摘要:This paper presents a multi-channel UART controller based on FPGA (Field Programmable Gate Array). UART a kind of serial communication circuit is used widely. A universal asynchronous receive/transmit (UART) is an integrated circuit which plays the most important role in serial communication.The architecture of the system is introduced. The flow charts of data processing as well as the implementation state machine are also presented in detail. The controller can be used to implement communications in complex system with different Baud Rates of sub-controllers. The controller is reconfigurable and scalable and it also can be used to reduce time delays between sub-controllers of a complex control system to improve the synchronization of each sub-controller.
  • 关键词:FIFO; FPGA; UART; MULTI-CHANNEL
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