期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN:2347-6710
电子版ISSN:2319-8753
出版年度:2016
卷号:5
期号:5
页码:7448
DOI:10.15680/IJIRSET.2016.0505141
出版社:S&S Publications
摘要:The paper offerings the project and investigation of an arbiter for well-organized multisystemcollaboration with sharedresources. The arbitration algorithm contains Index format of round robin arbiter to gain fastsystem performance and lower areaexecution and cost. The enquiry for data requests of clients under different prioritieshas been simulated. The resultsindicate, a better performance can be accomplished with this arbitration structure. Basedon the performance study, importance arbitration scheme can be custom tuned to meet the design necessities. Theimplementation of the arbiter withimportance arbitration scheme for SoC applications has also been explained. Thearbiter was implemented on FPGA andsynthesized by XILINX 14.2 version. The priority arbiter can be custom tunedto obtain high bandwidth utilization, low latencypower operative for on-chip bus communication.