期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
卷号：5
期号：5
页码：8787
DOI：10.15680/IJIRSET.2016.0505308
出版社：S&S Publications
摘要：Electrocardiogram, used as a primary diagnostic tool for cardiovascular diseases. The proposedarchitecture utilizes the time period of the ECG signals to diagnose the patient. A cleaned ECG signal providesnecessary information about the electrical physiology of the heart diseases and ischemic changes that may occur.Noises such as powerline interference, electromyography muscle noise, artifacts due to electrode motion and electrodecontact noise are present in an ECG signal. These noises are eliminated using the halfband (HB) filter and the timeperiod of the PQRST wave present in the ECG signal is calculated. This paper presents a new area-efficientElectrocardiogram system with reduced the power consumption and chip area. The ECG system has been synthesizedusing high level synthesis tool such as XILINX ISE 14.2 and the design flow is made and implemented in SPARTAN 6to achieve real time operation. The RTL of the design is made to VHDL to integrate the design into SPARTAN 6. Thesynthesis results yield that the area occupied is only 3%, power utilized to be 0.190 Watts and delay of 42.883ns aremeasured using XILINX ISE 14.2.
关键词：Electrocardiogram(ECG); Halfband filter (HB); VHDL language (Very High Speed Integrated Circuit;Hardware Description Language)
