期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
期号：NCFCSPS
页码：145
出版社：S&S Publications
摘要：The need to support various digital signal processing (DSP)and classification applications onenergy-constrained devices has steadily grown. Such applications often extensively perform matrixmultiplications using fixed-point arithmetic while exhibiting tolerance for some computational errors. Hence,improving the energy efficiency of multiplications is critical. In this brief, we propose multiplier architecturesthat can tradeoff computational accuracy with energy consumption at design time. Compared with a precisemultiplier, the proposed multiplier can consume 58% less energy/op with average computational error of ∼1%.Finally, we demonstrate that such a small computational error does not notably impact the quality of DSP andthe accuracy of classification applications.
