期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
期号：NCFCSPS
页码：171
出版社：S&S Publications
摘要：VLSI circuits are tested using BIST technique which avoids the requirement of external testingequipment. This method achieves simultaneous testing of the circuits under online mode. The aim of proposedproject is to design the logic module with SRAM cells to store input test vectors and to reduce the switchingactivity with reduced testing time and concurrent test latency. The proposed scheme is suitable for all types ofIC’s.
关键词：Built-In-Self Test; Active Test Set Generator and Comparator Circuit; Very Large Scale;Integrated Circuits
