期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2013
卷号：2
期号：5
页码：1368
出版社：S&S Publications
摘要：The main motive of this Thesis is to design a secured crypto device with less complication and highprotection by means of “ADVANCED AES” Algorithm along with self test procedure. The discriminating applicationof technological and associated procedural safeguards is an significant liability of every Federal organization inproviding sufficient security to its electronic data systems and coming to self test concept there are two main functionsthat must be performed on-chip in order to implement built-in self-test (BIST): test pattern generation and outputresponse analysis. The most common BIST schemes are based on pseudorandom test pattern generation using linearfeedback shift registers (LFSR’S) and output response compaction using signature analyzers. To accomplish highsecurity for a system we are using the crypto devices technique.
