期刊名称：International Journal of Computer Science and Network
印刷版ISSN：2277-5420
出版年度：2016
卷号：5
期号：4
页码：578-584
出版社：IJCSN publisher
摘要：A high speed RLCG circuit interconnects hasbecome faultless and has suited essential to address signalintegrity. For faultless representation a full wave explorationis required. Typically circuit simulation of RLC interconnectCPU is lavish. This paper discusses RLCG full waveexploration using frequency shift techniques. The resultsshown are efficient. It can also be done by Fourier seriesanalysis. A logical interconnects representation is introducebased on Fourier series exploration satisfactory for periodicsignal such as clock signal. In this representation, the far endtime domain zone waveform is estimates by the super-imposeof various sinusoids. The fifth and the higher harmonics areignored when closed form response of the 50% lag. Therepresentation is applied to the various allocated coupledinterconnect and interconnected trees. Good exactness isdetecting intermediately within the SPICE and modelsimulation. The computation complication of therepresentation is linear with the number of harmonics.
关键词：Fourier series; Crosstalk; Frequency Shift;Technique; RLCG Interconnect; VLSI
