期刊名称：International Journal of Reconfigurable Computing
印刷版ISSN：1687-7195
电子版ISSN：1687-7209
出版年度：2016
卷号：2016
DOI：10.1155/2016/3015403
出版社：Hindawi Publishing Corporation
摘要：This brief points out some problems when mapping the optimized GPCs using the heuristic of the paper above. A thorough analysis revealed that a significant number of additional LUTs are required to route the signals when mapping the optimized designs on current FPGAs. Taking these resources into account, the optimized GPCs require at least the same resources as previous state of the art.
