期刊名称：International Journal of Computer Science and Network Security
印刷版ISSN：1738-7906
出版年度：2010
卷号：10
期号：1
页码：260-263
出版社：International Journal of Computer Science and Network Security
摘要：This paper presents modeling and simulation of a wideband low jitter frequency synthesizer. The proposed system uses two phase-locked loops (PLLs) connected in cascade. The first PLL uses a voltage-controlled crystal oscillator (VCXO) to eliminate the input jitter and the second one is a wideband PLL. One important advantage of using the proposed system is that it uses only one VCXO for multiple carrier frequencies, while reducing the jitter considerably. The MATLAB Simulink simulation results show that the jitter could be minimized while working at different carrier frequencies.
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