期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2014
卷号：60
期号：3
出版社：Journal of Theoretical and Applied
摘要：Fully associative caches enable all blocks to map address. This paper proposes an algorithm to enable one fully associative block. The address a is right shifted by certain prefixed number of bits. The result is XOR�ed with n-1, n being the number of fully associative cache blocks. The bit selection of the result to map to one of the n blocks in fully associative cache is performed. The chosen block is enabled to access a line or place cache line. The proposed algorithm is simulated with SPEC2K benchmarks. The average memory access time is improved by 16% with energy savings of 9%. The proposed model shows 30% degradation in average memory access time with no change in energy consumption over direct mapped cache of same size.
