期刊名称:Journal of Theoretical and Applied Information Technology
印刷版ISSN:1992-8645
电子版ISSN:1817-3195
出版年度:2014
卷号:61
期号:2
出版社:Journal of Theoretical and Applied
摘要:Chip manufacturing technologies have been a key to the growth in all electronics devices over the past decades, bringing added convenience and accessibility through advantages in cost, size, and power consumption. Linear feedback shift register (LFSR) is key component to provide self-test of an integrated circuit (IC). This research is implemented LFSR until layout level which will be a key component for low power application. The research explores the LFSR as well as D flip flop using different architecture in a 0.18μm CMOS technology so that the layout area will be minimized as well as the power consumption will be lower. Three types of architectures are implemented into LFSR, which are NAND gates, pass transistor and transmission gates. Mentor graphics tools are used for comparing those LFSR design in terms of CMOS layout, hardware implementation and power consumption. The research showed that, pass transistor has smallest power consumption which is 3.1049 nano watts. Moreover, it required smallest number of transistor and layout area, which is 74 and 1137.76 micro square meter respectively.