期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2014
卷号：62
期号：3
出版社：Journal of Theoretical and Applied
摘要：Enabling one way in set associative cache during operation is proposed in literature. However, this architecture degrades the average memory access time. This paper proposes an algorithm to map to certain way in set associative cache improving the performance. The address is mapped to certain way by certain transformations involving XOR'ing and shifting and bit selection. The line is accessed or placed/replaced in the mapped way. One way is enabled during this operation. A mathematical model is developed for the proposed model. Conditions for energy saving and performance improvement are derived. Simulations with SPEC2K benchmarks are performed. Energy improvement of 38% with performance improvement of 20% is observed for the chosen parameters.
关键词：Average Memory Access Time; Cache Algorithm; Cache Performance; Energy Saving; Set Associative Cache
