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  • 标题:VLSI DESIGN OF FLOATING POINT ARITHMETIC & LOGIC UNIT
  • 本地全文:下载
  • 作者:DHANABAL R ; BHARATHI V ; G.SRI CHANDRAKIRAN
  • 期刊名称:Journal of Theoretical and Applied Information Technology
  • 印刷版ISSN:1992-8645
  • 电子版ISSN:1817-3195
  • 出版年度:2014
  • 卷号:64
  • 期号:3
  • 出版社:Journal of Theoretical and Applied
  • 摘要:In most modern general purpose computer one or more Floating Point Units are integrated with the CPU, however many embedded processors, especially older designs, do not have hardware support for floating point operation. In this paper, the design of DSP module such as floating point ALU is presented. The functions performed are handling of floating point data and converting data to IEEE 754 format and can perform arithmetic operations like Addition, Subtraction Multiplication and Division. The Simulation tool used is Model Sim for verifying functional simulation. The tool for synthesis and power analysis is Quartus II
  • 关键词:XOR; Full adders; XNOR; PTL; XOR-XNOR
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