期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2014
卷号：68
期号：3
出版社：Journal of Theoretical and Applied
摘要：Modulator is one of the most significant building-blocks in integrated discrete time component used in Sigma-Delta (ΣΔ) analog to digital converter. In this paper a novel structure of a switched-capacitor discrete time first order modulator Sigma-Delta is implemented at a supply voltage of 3 V. In addition, our design uses a Miller operational transconductance amplifier topology for low power consumption. The designed modulator has a resolution of 8 bits at a sampling frequency of 10.24 MHz. Eventually the modulator consumes only 1.16 mW of power under 3V. The core chip size of the modulator without bonding pads is 0.008 mm2 (76 �m x 110 �m) by using the AMS 0.35 �m CMOS technology.
