期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2017
卷号：8
期号：3
页码：1
DOI：10.5121/vlsic.2017.8301
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：In this paper, we show that the temperature-induced performance drop seen in nanoscale CMOScircuitscan be tackled by powering the circuits with adaptively regulated voltage power supplies.Essentially, when temperature rises, the supply voltage will be bumped up to offset otherwise performancedegradation. To avoid thermal over-drift as chip temperature exceeds its operation range, a voltagelimiteris integrated into the proposed power supply to cap the supply voltage. Using this proposed adaptivevoltage source to power individual CMOS logic gates and/or subsystems will free the chips from usingexpensive high-precision temperature sensors for thermal management and performance tuning.Experiments on various benchmark circuits, which are implemented with a 45nm CMOS technology, haveconfirmed that the circuit delay variation can be reduced to 15%~30% over a wide temperature range (0℃to 90℃), a sharp contrast to the large delay variations(50%~75%)observed in most IC designs where aconstant power supply is employed.
关键词：High performance VLSI circuits; temperature-insensitive; voltage control; power supply.
