期刊名称：International Journal of Computer Information Systems and Industrial Management Applications
印刷版ISSN：2150-7988
电子版ISSN：2150-7988
出版年度：2017
卷号：9
页码：87-95
出版社：Machine Intelligence Research Labs (MIR Labs)
摘要：Network on Chip (NoC) has been introduced asa cost effective solution to address the on chip design challengesof the dedicated bus-based communications for multicoreSystems-on-Chip(SoC). The increase in core density for amulticore system and parallel execution of programs over thesecores contribute to the multicasting. Multicast communicationresults in generation of multiple packets from a single source.Routers with input buffers form the backbone of a traditionalNoC based communication system. Buffer-less NoCs are gainingpopularity due to simplicity in the router design, low powerconsumption, and less chip area. Considering the cost overheadof the buffer NoCs deflection routers with minimal numberof buffers are gaining importance. All architectural enhancementproposed in NoC systems are focusing in input bufferedrouters. We propose a novel cost effective deflection architecturethat facilitates multicast support. We are making use of apartitioning mechanism for the flit duplication. Experimentalanalysis proves that our technique substantially reduces averagetransaction latency of multicast packets and link traversalcount without increasing the average deflection rate.
关键词：bufferless; deflection routing; link traversals; multithreaded;packet duplication; transaction latency.
