期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2018
卷号：7
期号：3
页码：2035
DOI：10.15680/IJIRSET.2018.0703010
出版社：S&S Publications
摘要：The needs for low power and high speed circuits are increasing in modern electronics. The carriergeneration and phase locking are very important for transceiver circuits. The frequency synthesizer based on the phaselockedloop (PLL) is a basic building block of the transceiver. The frequency synthesizer that generates carrier for thedown-conversion/up-conversion operations, it operates at high frequency and it consumes a very large portion of thetotal power of the circuit. The frequency synthesizer based on phase lock loop consists of voltage controlled oscillator,phase detector; low pass filter and N frequency divider. The voltage controlled oscillator (VCO) and N frequencydivider consumes the maximum power. This paper presents a frequency synthesizer which is designed with low powerconsumptions voltage controlled oscillator (VCO) circuit and frequency divider circuit. Finally we proposed a phaselock loop N frequency synthesizer using the proposed low power building blocks and results of our low power PLLfrequency synthesizer.
关键词：Frequency Synthesizer; PLL; VCO; and Charge Pump
