期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2018
卷号：6
期号：2
页码：1626
DOI：10.15680/IJIRCCE.2018.0602078
出版社：S&S Publications
摘要：In modern computer memory, a sense amplifier is one of the elements which make up the circuitry on asemiconductor memory chip (integrated circuit); the term itself dates back to the era of magnetic core memory. In thispaper we have designed Faster & Power Efficient Sense Amplifier for CMOS SRAM using VLSI Technology.Schematic of the sense amplifier design is implemented using mentor graphics 130nm (PYXIS GDK) technology andlayout also done for the proposed design. Our focus will be to reduce the transistor count, to improve the powerconsumption, power dissipation and also to improve the response time of sense amplifier
