首页    期刊浏览 2024年11月29日 星期五
登录注册

文章基本信息

  • 标题:Design of On-Chip Permutation Network with Programmable Arbiter for application level selection of arbitration scheme
  • 本地全文:下载
  • 作者:M.Ravinder ; K.Hanuja
  • 期刊名称:International Journal of Innovative Research in Science, Engineering and Technology
  • 印刷版ISSN:2347-6710
  • 电子版ISSN:2319-8753
  • 出版年度:2016
  • 卷号:5
  • 期号:8
  • 页码:15762
  • DOI:10.15680/IJIRSET.2016.0508200
  • 出版社:S&S Publications
  • 摘要:This paper presents the guaranteed bandwidth design of a novel on-chip network to support guaranteedtraffic permutation in multiprocessor system-on-chip applications. The proposed network employs a pipelined circuitswitchingapproach combined with a dynamic path-setup scheme under a multistage network topology. The dynamicpath-setup scheme enables runtime path arrangement for arbitrary traffic permutations.In this, Three arbitrary schemesare proposed ,which are Fixed priority,Round Robbin,Weighted priority or Garunteed bandwidth scheme.
  • 关键词:Guaranteed throughput; multistage interconnection network; network-on-chip; permutation network;pipelined circuit-switching;traffic permutation.
国家哲学社会科学文献中心版权所有