期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
卷号：5
期号：9
页码：15990
DOI：10.15680/IJIRSET.2016.0509013
出版社：S&S Publications
摘要：Adder has applications in digital signal processing to perform finite impulse response and infiniteimpulse response. In Ripple carry adder only when the previous Carry is known then only computation will happen forSum and Carry, so Delay will be more is the disadvantage but area will be less. when compared to carry look aheadadder in which area will be the disadvantage but speed will be the advantage. Now we need to reduce the Area as wellas Power. We are going to Design the Circuit in Transistor level and Aiming for Maximum Optimization. In thisproject the proposed Adder has been designed by using STATIC CMOS 180nm TECHNOLOGY and the toolbeing used is TANNER EDA tool.
