期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
卷号：5
期号：11
页码：19396
DOI：10.15680/IJIRSET.2016.0511124
出版社：S&S Publications
摘要：Discrete Hartley transform is one of the most important algorithms of the signal processing and image processingsystem. Now a day in every field required an ever growing demand for high speed processing and low area design. Manytypes of discrete Hartley transform algorithm are design in different adder but day by day is required high speed adder.In this paper, we introduce a novel architecture to perform high speed adder using half adder (HA) and XOR gatetechniques. Here, for enhancing the speed of addition, we are proposing Kogge Stone adder instead of other adder likeripple carry adder, look a-head carry adder in different-different manner, which has less propagation delay. All designis verified in Xilinx tool with different device family and the timing and area of the design, on the same have beencalculated.
关键词：Discrete Hartley Transform (DHT); Kogge-stone adder; and Xilinx Spartan family.
