期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2016
卷号：5
期号：12
页码：21388
DOI：10.15680/IJIRSET.2016.0512133
出版社：S&S Publications
摘要：This paper describes different methods on-chip test generation method for functional tests. Thehardware was based on application of primary input sequences in order to allow the circuit to produce reachablestates. Random primary input sequences were modeled to avoid repeated synchronization and thus yields varied setsof reachable states by implementing a decoder in between circuit and LFSR. The on-chip generation of functionaltests require simple hardware and achieved high transition fault coverage for testable circuits. Further, power anddelay can be reduced by using Bit Swapping LFSR(BS-LFSR).This technique yields less number of transitions forall pattern generation. Bit-swapping(BS) technique is less complex and more reliable to hardwaremiscommunications.
关键词：Built-in test generation; functional tests; reachable states; Bit Swapping LFSR(BS-LFSR).
