期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2017
卷号：6
期号：2
页码：2874
DOI：10.15680/IJIRSET.2017.0602152
出版社：S&S Publications
摘要：Discrete Hartley transform is one of the most important algorithms of the signal processing and imageprocessing system. Now a day in every field required an ever growing demand for high speed processing and low areadesign. Many types of discrete Hartley transform algorithm are design in different adder but day by day is required highspeed adder. In this paper, we introduce a novel architecture to perform high speed adder using half adder (HA) andXOR gate techniques. Here, for enhancing the speed of addition, we are proposing Kogge Stone adder instead of otheradder like ripple carry adder, look a-head carry adder in different-different manner, which has less propagation delay.All design is verified in Xilinx tool with different device family and the timing and area of the design, on the same havebeen calculated.
关键词：Discrete Hartley Transform (DHT); Kogge-stone adder; and Xilinx Spartan family.
