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  • 标题:CMOS RF Power Amplifier Using Reconfigurable Interstage Network for Envelope Tracking
  • 本地全文:下载
  • 作者:Neha A. Kashiwar ; Prof. S. S. Agrawal
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2017
  • 卷号:5
  • 期号:5
  • 页码:9305
  • DOI:10.15680/IJIRCCE.2017.0505082
  • 出版社:S&S Publications
  • 摘要:A two-stage broadband CMOS stacked FET RF power amplifier with a reconfigurable interstagematching network is designed. The objective is to design a broadband power amplifier fallowed by a reconfigurableswitch to separate out the signals to desired band. Efficiency and bandwidth limitation problem of power amplifier hasbecome more serious with introduction of fourth generation long term evolution standard. To overcome the bandwidthlimitation from the high-Q interstage impedance, a reconfigurable interstage matching network based on doublefrequency mode of operation is proposed. The reconfigurable interstage network is composed of distributed RF switch.This reconfigurable network based on class-J mode of operation used to get increased output power with highefficiency. The output matching is realized with low pass matching network. The proposed RF power amplifier isdesigned using 0.13 um silicon-on-insulator CMOS and covers frequency band from 0.65 to 1.20 GHz. This poweramplifier represents increased Power Added Efficiency (PAE) of 67.66 and bandwidth (BW) of 550MHz.
  • 关键词:Broadband; CMOS; high efficiency; power amplifier; stacked FET;power amplifier.
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