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  • 标题:Low Phase Noise and Low PowerSelf-Oscillating Mixer in 130-nm CMOS Technology for S-band Applications
  • 本地全文:下载
  • 作者:Kavita A. Dhuppe ; Prof. S. S. Agrawal
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2017
  • 卷号:5
  • 期号:6
  • 页码:11267
  • DOI:10.15680/IJIRCCE.2017.0506039
  • 出版社:S&S Publications
  • 摘要:The design of a 2.7-3 GHz Self-oscillating mixer based on NMOS cross-coupled structure using TSMC130nm CMOS technology is presented. The obtained phase noise of SOM is -112.28dBc/Hz at 1MHz offset which islower than any of the previous work. The conversion gain obtained is -27.24dB for Vtune of 900mV. The total powerconsumption is only 3.73mW for 0.8V supply voltage. The frequency tuning range of the SOM is from 2.72 GHz to3.38 GHz when the control voltage changes from 0 to 1.5V. The total chip area including the pads is 0.24mm2. theproposed SOM meets all the requirement of low cost, low phase noise, low power consumption, high conversion gainand minimum hip area. This SOM can be used in any of the transceiver system.
  • 关键词:injection locking; Self-oscillating mixer (SOM); voltage-controlled oscillator (VCO); low power;CMOS.
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