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  • 标题:Proficient Majority Logic Fault Detection and Correction to Decode Mainstream Logic Design by Using EG-LDPC Codes
  • 本地全文:下载
  • 作者:K Pavan Kumar ; R Vasim Akram
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2017
  • 卷号:5
  • 期号:8
  • 页码:14045
  • DOI:10.15680/IJIRCCE.2017.0508030
  • 出版社:S&S Publications
  • 摘要:Euclidean Geometry LDPC (EG-LDPC) codes — enable dynamic changes in level of fault tolerance.EG-LDPC codes enables us to dynamically adjust the error correcting capacity for improved system performance apartfrom the high error correcting capability as well as sparsity. Memories are typically protected with error correctioncodes to prevent soft errors from causing data corruption. The MLD codes are used for memory application as becauseof correcting large number of soft errors, less decoding time, area consumption,etc. But Majority logic decoding can beimplemented serially with simple hardware but requires a large decoding time compared to difference set low densityparity check codes. The combined method of MLD with EG-LDPC detects whether a word has errors in the firstiterations of majority logic decoding, and when there are no errors the decoding ends without completing the rest of theiterations.
  • 关键词:Error correction codes; Euclidean geometry low-density parity check (EG-LDPC) codes; majority;logic decoding(MLD).
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