期刊名称：International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN：2320-9798
电子版ISSN：2320-9801
出版年度：2017
卷号：5
期号：10
页码：15997
DOI：10.15680/IJIRCCE.2017.0510060
出版社：S&S Publications
摘要：Transpose form finite-impulse response (FIR) filters are inherently pipelined and support multipleconstant multiplications (MCM) technique that results in significant saving of computation. However, transpose formconfiguration does not directly support the block processing unlike direct form configuration. In this paper, we explorethe possibility of realization of block FIR filter in transpose form configuration for area-delay efficient realization oflarge order FIR filters for both fixed and reconfigurable applications. Based on a detailed computational analysis oftranspose form configuration of FIR filter, we have derived a flow graph for transpose form block FIR filter withoptimized register complexity. A generalized block formulation is presented for transpose form FIR filter. We havederived a general multiplier-based architecture for the proposed transpose form block filter for reconfigurableapplications. A low-complexity design using the MCM scheme is also presented for the block implementation of fixedFIR filters. The proposed structure involves significantly less areadelay product (ADP) and less energy per sample(EPS) than the existing block implementation of direct-form structure for medium or large filter lengths, while for theshort-length filters, the block implementation of direct-form FIR structure has less ADP and less EPS than the proposedstructure. Application specific integrated circuit synthesis result shows that the proposed structure for block size 4 andfilter length 64 involves 42% less ADP and 40% less EPS than the best available FIR filter structure proposed forreconfigurable applications. For the same filter length and the same block size, the proposed structure involves 13%less ADP and 12.8% less EPS than that of the existing direct-form block FIR structure..
