期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2015
卷号：6
期号：4
页码：15
DOI：10.5121/vlsic.2015.6402
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：A new design for fault tolerant and fault recoverable ALU System has been proposed in this paper.Reliability is one of the most critical factors that have to be considered during the designing phase of anyIC. In critical applications like Medical equipment & Military applications this reliability factor plays avery critical role in determining the acceptance of product. Insertion of special modules in the main designfor reliability enhancement will give considerable amount of area & power penalty. So, a novel approachto this problem is to find ways for reusing the already available components in digital system in efficientway to implement recoverable methodologies. Triple Modular Redundancy (TMR) has traditionally usedfor protecting digital logic from the SEUs (single event upset) by triplicating the critical components of thesystem to give fault tolerance to system. ScTMR- Scan chain-based error recovery TMR technique providesrecovery for all internal faults. ScTMR uses a roll-forward approach and employs the scan chainimplemented in the circuits for testability purposes to recover the system to fault-free state. The proposeddesign will incorporate a ScTMR controller over TMR system of ALU and will make the system faulttolerant and fault recoverable. Hence, proposed design will be more efficient & reliable to use in criticalapplications, than any other design present till today.
