期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2015
卷号：6
期号：6
页码：33
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：Minimizing power consumption is a primary consideration in hardware design of portable devices wherehigh performance and functionality is required with limited battery power. With the scaling of technologyand the need for high performance and more functionality, power dissipation becomes a major bottleneckfor microprocessor systems design. Clock power can be significant in high performance systems. Dynamicpower can contribute up to 50% of the total power dissipation. The main goal of this work is to implementa prototype power optimized datapath unit and ALU of Hybrid Embedded Controller Architecture targetedon to the FPGA chip and analyze the power consumption of the datapath, ALU etc. Dynamic powermanagement system which includes clock gating, qualified system latches are incorporated into thisdesign. The whole design is captured using VHDL make use of Xilinx tool. This paper gives completeguidelines for authors submitting papers for the AIRCC Journals.
关键词：Power Consumption; Clock power; Datapath; ALU; Dynamic Power
