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  • 标题:Compact Low-Power High Slew-Rate CMOS Buffer Amplifier with Power Gating Technique
  • 本地全文:下载
  • 作者:Ajay Yadav ; Saurabh Khandelwal ; Shyam Akashe
  • 期刊名称:International Journal of VLSI Design & Communication Systems
  • 印刷版ISSN:0976-1527
  • 电子版ISSN:0976-1357
  • 出版年度:2014
  • 卷号:5
  • 期号:3
  • 页码:13
  • DOI:10.5121/vlsic.2014.5302
  • 出版社:Academy & Industry Research Collaboration Center (AIRCC)
  • 摘要:A qualitative analysis of different parameters such as Phase noise, Slew rate and tranconductance by usingpower gating reduction technique is presented. The circuit achieves the large driving capability byemploying simple comparators to sense the transients of the input to turn on the output stages, which arestatically off in the stable state. The effect of the different number of transistors and their topologies on thephase noise and Slew rate is analyzed. Good agreement between qualitative and quantitative measurementsis observed. Scope of reducing of Noise and avoidance of Leakage due to various sources is discussed.
  • 关键词:Amplifier; buffer circuits; drains circuit; cascaded stages and source driver
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