期刊名称：International Journal of VLSI Design & Communication Systems
印刷版ISSN：0976-1527
电子版ISSN：0976-1357
出版年度：2014
卷号：5
期号：3
页码：59
DOI：10.5121/vlsic.2014.5306
出版社：Academy & Industry Research Collaboration Center (AIRCC)
摘要：The design of CMOS analog circuitry for acquiring 12 lead ECG is presented. The existing methodsemploy separate multiplexers and associated circuitry for signal acquisition operating at typical voltage of± 5V. The proposed system employs dynamic threshold logic to achieve low power, wide dynamic rangegood linearity with a supply voltage of 0.4V. The power dissipation obtained was 22.12μW. Utilizing thedynamic threshold logic the proposed circuitry is implemented with 0.18μm CMOS technology. This ECGsignal processor is highly suitable for wearable applications of long term cardiac monitoring.
关键词：12 Lead ECG; Dynamic Threshold; dynamic range; Low power; analog multiplexer
