期刊名称：International Journal of Innovative Research in Science, Engineering and Technology
印刷版ISSN：2347-6710
电子版ISSN：2319-8753
出版年度：2017
卷号：6
期号：8
页码：16150
DOI：10.15680/IJIRSET.2017.0608074
出版社：S&S Publications
摘要：In this paper linearity enhancement technique for folded cascode LNA (Low Noise Amplifier) at lowvoltage operation are presented. To achieve high linearity this FC-LNA adopted MDS technique at CS (commonsource) stage. By employing the MDS (Modified Derivative Super position) Technique, the LNA operate at differentbiasing conditions of transistors while maintaining the increased linearity due to compression of IM3 interferer. Inorder to estimate the advantage of this FC-LNA is implemented and simulated in 0.18μm CMOS process for 2.4 GHzusing cadence virtuoso. From the measurement results The proposed LNA a Input Return Loss (S11) of -26.5 dB, Gain(S21) of 10.5 dB, Noise figure of 1.9 dB, and third order input intercept point (IIP3) of +2.96 dBm at supply voltage of0.6V.
