期刊名称：Journal of Theoretical and Applied Information Technology
印刷版ISSN：1992-8645
电子版ISSN：1817-3195
出版年度：2018
卷号：96
期号：14
出版社：Journal of Theoretical and Applied
摘要：This paper presents a hardware architecture of the Adaptive Dual Threshold Filter (ADTF). This architecture leads to real-time process of the ECG signal denoising. The ADTF is a recent technique that offers a simple and efficient algorithm of the ECG signal denoising. The implementation of the ADTF is based on a structural VHDL description of different functional blocks. The overall architecture was designed and parallelized in order to accelerate processing. Results of this architecture design show high performances of the real-time denoising process of the ECG signal. The proposed architecture presents a low complexity and a low occupancy of the various resources of an FPGA architecture based low-cost systems presented in this research work.
关键词：Electrocardiogram; VHDL; Real-Time; ADTF; FPGA; Low-Cost Systems
