期刊名称：International Journal of Electrical and Computer Engineering
电子版ISSN：2088-8708
出版年度：2018
卷号：8
期号：2
页码：926-932
DOI：10.11591/ijece.v8i2.pp926-932
语种：English
出版社：Institute of Advanced Engineering and Science (IAES)
摘要：This paper presents a 60 GHz power amplifier (PA) suitable for wireless communications. The two-stage wideband PA is fabricated in 55 nm CMOS. Measurement results show that the PA obtains a peak gain of 16 dB over a -3 dB bandwidth from 57 GHz to 67 GHz. It archives an output 1 dB compression point (OP1dB) of 4 dbm and a peak power added efficiency (PAE) of 12.6%. The PA consumes a total DC power of 38.3 mW from a 1.2 V supply voltage while its core occupies a chip area of 0.45 mm2.
其他摘要：This paper presents a 60 GHz power amplifier (PA) suitable for wireless communications. The two-stage wideband PA is fabricated in 55 nm CMOS. Measurement results show that the PA obtains a peak gain of 16 dB over a -3 dB bandwidth from 57 GHz to 67 GHz. It archives an output 1 dB compression point (OP1dB) of 4 dbm and a peak power added efficiency (PAE) of 12.6%. The PA consumes a total DC power of 38.3 mW from a 1.2 V supply voltage while its core occupies a chip area of 0.45 mm2.
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