期刊名称：IEEE Transactions on Emerging Topics in Computing
印刷版ISSN：2168-6750
出版年度：2018
卷号：6
期号：3
页码：317-329
DOI：10.1109/TETC.2016.2579605
出版社：IEEE Publishing
摘要：In this paper we present a new Partitioning and Placement methodology able to maps Spiking Neural Network on parallel neuromorphic platforms. This methodology improves scalability/reliability of Spiking Neural Network (SNN) simulations on many-core and densely interconnected platforms. SNNs mimic brain activity by emulating spikes sent between neuron populations. Many-core platforms are emerging computing targets that aim to achieve real-time SNN simulations. Neurons are mapped to parallel cores, and spikes are sent in the form of packets over the on-chip and off-chip network. However, the activity of neuron populations is heterogeneous and complex. Thus, achieving an efficient exploitation of platform resources is a challenge that often affects simulation scalability/reliability. To address this challenge, the proposed methodology uses customised SNN to profile the board bottlenecks and implements a SNN partitioning and placement (SNN-PP) algorithm for improving on-chip and off-chip communication efficiency. The cortical microcircuit SNN was simulated and performances of the developed SNN-PP algorithm were compared with performances of standard methods. These comparisons showed significant traffic reduction produced by the new method, that for some configurations reached up to 96X. Results demonstrate that it is possible to consistently reduce packet traffic and improve simulation scalability/reliability with an effective neuron placement.
关键词：Neuromorphic platform;many-core SoC;profiling methodology;spiking neural network;partitioning and placement
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