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  • 标题:Modeling of Manufacturing Processes in EPIC Technology
  • 本地全文:下载
  • 作者:Kašauskas ; Anilionis ; Eidukas
  • 期刊名称:Studies About Languages
  • 印刷版ISSN:2029-7203
  • 出版年度:2015
  • 卷号:87
  • 期号:7
  • 页码:49-52
  • DOI:10.5755/j01.eee.87.7.11210
  • 语种:English
  • 出版社:Faculty of Humanities, Kaunas University of Technology
  • 其他摘要:EPIC technology is used for specialized IC formatting on the ground of transistor structures. The change of structure in IC manufacturing cycle is mostly determined by high temperature technological processes (HTTP) regiments, which influence diffuse layer dopant redistribution, and by this determine characteristics and manufacturing errors of elements formed. Main regiments of HTTP are considered time for structure formatting and technological process (TP) temperature. The main goal is to analyze and model the cycle of HTTP used in EPIC technology and their influence to ach other and current gain  and . IIl. 5, bibl. 8 (in English; summaries in English, Russian, Lithuanian).
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