出版社：Faculty of Humanities, Kaunas University of Technology
其他摘要：Problems of technology LOCOS, related with oxidation time, temperature, silicon oxide layer, patterned silicon nitride in CMOS structure was researched. During LOCOS most CMOS quality depend on gate channel shortening, diffusion region separation. LOCOS CMOS mathematical models are created using program SUPREM. It is determined, that most acceptable results are received when time t=360 min., temperature T=1000ºC, SiO2 thickness = 0,02 μm., Si3N4 thickness = 0,1 μm. Ill. 10, bibl. 5 (in Lithuanian, summaries in Lithuanian, English and Russian).
