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  • 标题:Valley-engineered ultra-thin silicon for high-performance junctionless transistors
  • 本地全文:下载
  • 作者:Seung-Yoon Kim ; Sung-Yool Choi ; Wan Sik Hwang
  • 期刊名称:Scientific Reports
  • 电子版ISSN:2045-2322
  • 出版年度:2016
  • 卷号:6
  • 期号:1
  • DOI:10.1038/srep29354
  • 语种:English
  • 出版社:Springer Nature
  • 摘要:Extremely thin silicon show good mechanical flexibility because of their 2-D like structure and enhanced performance by the quantum confinement effect. In this paper, we demonstrate a junctionless FET which reveals a room temperature quantum confinement effect (RTQCE) achieved by a valley-engineering of the silicon. The strain-induced band splitting and a quantum confinement effect induced from ultra-thin-body silicon are the two main mechanisms for valley engineering. These were obtained from the extremely well-controlled silicon surface roughness and high tensile strain in silicon, thereupon demonstrating a device mobility increase of ~500% in a 2.5 nm thick silicon channel device.
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