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  • 标题:A learnable parallel processing architecture towards unity of memory and computing
  • 本地全文:下载
  • 作者:H. Li ; B. Gao ; Z. Chen
  • 期刊名称:Scientific Reports
  • 电子版ISSN:2045-2322
  • 出版年度:2015
  • 卷号:5
  • 期号:1
  • DOI:10.1038/srep13330
  • 语种:English
  • 出版社:Springer Nature
  • 摘要:Developing energy-efficient parallel information processing systems beyond von Neumann architecture is a long-standing goal of modern information technologies. The widely used von Neumann computer architecture separates memory and computing units, which leads to energy-hungry data movement when computers work. In order to meet the need of efficient information processing for the data-driven applications such as big data and Internet of Things, an energy-efficient processing architecture beyond von Neumann is critical for the information society. Here we show a non-von Neumann architecture built of resistive switching (RS) devices named “iMemComp”, where memory and logic are unified with single-type devices. Leveraging nonvolatile nature and structural parallelism of crossbar RS arrays, we have equipped “iMemComp” with capabilities of computing in parallel and learning user-defined logic functions for large-scale information processing tasks. Such architecture eliminates the energy-hungry data movement in von Neumann computers. Compared with contemporary silicon technology, adder circuits based on “iMemComp” can improve the speed by 76.8% and the power dissipation by 60.3%, together with a 700 times aggressive reduction in the circuit area.
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