期刊名称：Lecture Notes in Engineering and Computer Science
印刷版ISSN：2078-0958
电子版ISSN：2078-0966
出版年度：2019
卷号：2241
页码：61-66
出版社：Newswood and International Association of Engineers
摘要：With the development of the Internet of Things
(IoT), various signal processing algorithms have been widely
used in IoT devices. Convolutional neural networks (CNN),
image processing algorithms and speech processing algorithms
are important signal processing algorithms that play an
important role in various intelligent IoT devices. In order to
enable IoT devices with limited computing power to support
various signal processing algorithms, In this paper, we propose a
small area reconfigurable multi-algorithm accelerator to
accelerate various signal processing algorithms through
hardware. The accelerator realizes reconfiguration of its own
structure based on Dynamic Partial Reconfiguration (DPR)
function of FPGA. A SoC verification system based on
Cortex-M3 is constructed to verify the performance of the
designed accelerator. The Lenet-5 network, Sobel Edge Detector
algorithm and FIR filtering algorithm are implemented on this
accelerator. The execution time of Lenet-5 network is compared
with that of Intel i5 7500, Cortex-A53 and Cortex-A7 CPU. The
execution time of Sobel Edge Detector algorithm and FIR
filtering algorithm is compared with software implementation of
same design on Cortex-M3 core. The comparison results show
that the CNN computing power of the proposed accelerator
exceeds that of Cortex-A53 and Cortex-A7 at the main
frequency of 50MHz. The computing time of Sobel Edge
Detector algorithm and FIR filter algorithm is also reduced in
comparison to the software implementation.
