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  • 标题:Review Paper on Hybrid Square Kogge Stone Adder and Vedic Multiplier Technique
  • 本地全文:下载
  • 作者:Vivek Gupta ; Prof. Vaibhav Jindal
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2018
  • 卷号:6
  • 期号:6
  • 页码:6349-6355
  • DOI:10.15680/IJIRCCE.2018.0606038
  • 出版社:S&S Publications
  • 摘要:In this Technical era the high speed and low area of VLSI chip are very- very essential factors. Day by day number of transistors and other active and passive elements are growing on VLSI chip. In Integral part of the processor adders play an important role. In this paper we are studied of hybrid kogge-stone adders and Vedic multiplier for binary addition to reduce the size and increase the efficiency or processor’s speed.Hybridkogge stone adder and Vedic multiplier provides less components, less path delay and better speed compare to other existing kogge stone adder and other adders. Here we are comparing the kogge stone adders of different-different word size from other adders.
  • 关键词:KoggeStone Adder; Ripple Carry Adder; Hybrid Kogge Stone Adder
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