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  • 标题:Low Power High Speed Body Bias Controlled Current Latch Sense Amplifier
  • 本地全文:下载
  • 作者:Gajendra Sujediya
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2018
  • 卷号:6
  • 期号:10
  • 页码:8157-8164
  • DOI:10.15680/IJIRCCE.2018. 0610034
  • 出版社:S&S Publications
  • 摘要:Sense amplifiers are extensively used in memory. Sense amplifiers are one of the most vital circuits in the periphery of CMOS memories. We know that memory is the heart of all digital systems. Today all worlds are demanding high speed and low power dissipation as well as small area. We know that speed and power dissipation of memory is overall depends upon the sense amplifier we used and their performance strongly affects both memory access time, and overall memory power dissipation. So it is important to design a good sense amplifier which performs well in both speed and power dissipation. In this dissertation, an implementation of a most efficient sense amplifier is done by comparing the best known sense amplifier in today. The dissertation focuses on design, simulation and performance analysis of sense amplifiers.
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