期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
印刷版ISSN:2320-9798
电子版ISSN:2320-9801
出版年度:2019
卷号:7
期号:2
页码:1349-1354
DOI:10.15680/IJIRCCE.2019. 0702137
出版社:S&S Publications
摘要:Discrete Hartley Transform (DHT) is one of the transform used for converting data in time domain into
frequency domain using only real values. DHT can be used for highly modular and parallel processing of data in VLSI
applications. It have proposed a new algorithm for calculating DHT of length 2N
, where N=3 and 4. The implemented
urdhwa parallel multiplier and partition multiplier is improvement in place of simple multiplication used in
conventional DHT. This paper studied of conventional DHT algorithm and proposed DHT algorithm in terms of delays
and area.