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  • 标题:Low Power Consumption forRadix-2 Fast Fourier Transform using DKG Reversible Gate
  • 本地全文:下载
  • 作者:Jainendra Dwivedi ; Prof. Anshuj Jain
  • 期刊名称:International Journal of Innovative Research in Computer and Communication Engineering
  • 印刷版ISSN:2320-9798
  • 电子版ISSN:2320-9801
  • 出版年度:2019
  • 卷号:7
  • 期号:5
  • 页码:3137-3142
  • DOI:10.15680/IJIRCCE.2019. 0705089
  • 出版社:S&S Publications
  • 摘要:It is also a well-known fact that the multiplier unit forms an integral part of processor design, due to this, high speed digital processor architecture become the need of the day. In his paper a novel programmable FFT architecture for radix-2 DIT algorithm using reversible DKG gate is implementation.DKG gate is 4×4 reversible gate and working on both adder and sub-tractor. Recent advances in reversible logic using and quantum computer algorithms allow for improved computer architecture and arithmetic logic unit designs. The proposed design issynthesized using Xilinx ISE software and simulated using VHDL test bench.
  • 关键词:Reversible Gates; Adder; Sub tractor; Fast Fourier Transform; DKG Gate
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