文章基本信息

标题：Hardware reduction for LUT-based mealy FSMs
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作者：Alexander Barkalov ; Larysa Titarenko ; Kamil Mielcarek 等
期刊名称：International Journal of Applied Mathematics and Computer Science
电子版ISSN：2083-8492
出版年度：2018
卷号：28
期号：3
页码：1-13
DOI：10.2478/amcs-2018-0046
出版社：De Gruyter Open
摘要：A method is proposed targeting a decrease in the number of LUTs in circuits of FPGA-based Mealy FSMs. The method improves hardware consumption for Mealy FSMs with the encoding of collections of output variables. The approach is based on constructing a partition for the set of internal states. Each state has two codes. It diminishes the number of arguments in input memory functions. An example of synthesis is given, along with results of investigations. The method targets rather complex FSMs, having more than 15 states.
关键词：Mealy FSM; synthesis; FPGA; LUT; partition; encoding collections of output variables;