期刊名称：American Journal of Electrical and Electronic Engineering
印刷版ISSN：2328-7365
电子版ISSN：2328-7357
出版年度：2020
卷号：8
期号：4
页码：120-124
DOI：10.12691/ajeee-8-4-4
出版社：Science and Education Publishing
摘要：In this communication, a new CMOS circuit configuration is proposed to realize a voltage-controlled negative resistance (VCNR) which has been implemented using only eight MOS transistors- all working in the saturation region. The value of the realized negative resistance is controlled by two identical and opposite external DC voltages. The workability of the proposed circuit has been confirmed by Cadence Virtuoso simulations and some sample results have been given. The proposed VCNR circuit has been shown to exhibit good linearity, has good variable negative resistance range from -1.05kΩ and -300Ω and offers a good operational frequency range up to around 100 MHz with total power dissipation between 0.5mW- 8.73mW only.
