标题：Electrode and dielectric layer interface device engineering study using furan flanked diketopyrrolopyrrole–dithienothiophene polymer based organic transistors
摘要：We successfully demonstrated a detailed and systematic enhancement of organic field effect transistors (OFETs) performance using dithienothiophene (DTT) and furan-flanked diketopyrrolopyrrole based donor–acceptor conjugated polymer semiconductor namely PDPPF-DTT as an active semiconductor. The self-assembled monolayers (SAMs) treatments at interface junctions of the semiconductor–dielectric and at the semiconductor–metal electrodes has been implemented using bottom gate bottom contact device geometry. Due to SAM treatment at the interface using tailored approach, the significant reduction of threshold voltage (Vth) from − 15.42 to 5.74 V has been observed. In addition to tuning effect of Vth, simultaneously charge carrier mobility (µFET) has been also enhanced the from 9.94 × 10−4 cm2/Vs to 0.18 cm2/Vs. In order to calculate the trap density in each OFET device, the hysteresis in transfer characteristics has been studied in detail for bare and SAM treated devices. Higher trap density in Penta-fluoro-benzene-thiol (PFBT) treated OFET devices enhances the gate field, which in turn controls the charge carrier density in the channel, and hence gives lower Vth = 5.74 V. Also, PFBT treatment enhances the trapped interface electrons, which helps to enhance the mobility in this OFET architecture. The overall effect has led to possibility of reduction in the Vth with simultaneous enhancements of µFET in OFETs, following systematic device engineering methodology.
其他摘要：Abstract We successfully demonstrated a detailed and systematic enhancement of organic field effect transistors (OFETs) performance using dithienothiophene (DTT) and furan-flanked diketopyrrolopyrrole based donor–acceptor conjugated polymer semiconductor namely PDPPF-DTT as an active semiconductor. The self-assembled monolayers (SAMs) treatments at interface junctions of the semiconductor–dielectric and at the semiconductor–metal electrodes has been implemented using bottom gate bottom contact device geometry. Due to SAM treatment at the interface using tailored approach, the significant reduction of threshold voltage (V th ) from − 15.42 to 5.74 V has been observed. In addition to tuning effect of V th , simultaneously charge carrier mobility (µ FET ) has been also enhanced the from 9.94 × 10 −4 cm 2 /Vs to 0.18 cm 2 /Vs. In order to calculate the trap density in each OFET device, the hysteresis in transfer characteristics has been studied in detail for bare and SAM treated devices. Higher trap density in Penta-fluoro-benzene-thiol (PFBT) treated OFET devices enhances the gate field, which in turn controls the charge carrier density in the channel, and hence gives lower V th = 5.74 V. Also, PFBT treatment enhances the trapped interface electrons, which helps to enhance the mobility in this OFET architecture. The overall effect has led to possibility of reduction in the V th with simultaneous enhancements of µ FET in OFETs, following systematic device engineering methodology.
