期刊名称：Advances in Electrical and Computer Engineering
印刷版ISSN：1582-7445
电子版ISSN：1844-7600
出版年度：2013
卷号：13
期号：3
页码：121-126
DOI：10.4316/AECE.2013.03019
出版社：Universitatea "Stefan cel Mare" Suceava
摘要：This article aims to describe a model to accelerate the execution of a parallel algorithm implemented on a Cell B.E. processor. The algorithm implements a technique of finding a moving target in a maze with dynamic architecture, using another technique of pipelining the data transfers between the PPU and SPU threads. We have shown that by using the pipelining technique, we can achieve an improvement of the computing time (around 40%). It can be also seen that the pipelining technique with one SPU is about as good as the parallel technique with four SPUs.
