期刊名称：International Journal of Reconfigurable Computing
印刷版ISSN：1687-7195
电子版ISSN：1687-7209
出版年度：2008
卷号：2008
DOI：10.1155/2008/738174
出版社：Hindawi Publishing Corporation
摘要：In real-time signal processing, a single application often has multiple computationally intensive
kernels that can benefit from acceleration using custom or reconfigurable hardware platforms,
such as field-programmable gate arrays (FPGAs). For adaptive utilization of resources at run time,
FPGAs with capabilities for dynamic reconfiguration are emerging. In this context, it is useful for
designers to derive sets of efficient configurations that trade off application performance with
fabric resources. Such sets can be maintained at run time so that the best available design tradeoff
is used. Finding a single, optimized configuration is difficult, and generating a family of
optimized configurations suitable for different run-time scenarios is even more challenging. We
present a novel multiobjective wordlength optimization strategy developed through FPGA-based
implementation of a representative computationally intensive image processing application:
medical image registration. Tradeoffs between FPGA resources and implementation accuracy are
explored, and Pareto-optimized wordlength configurations are systematically identified. We also
compare search methods for finding Pareto-optimized design configurations and demonstrate the
applicability of search based on evolutionary techniques for identifying superior multiobjective
tradeoff curves. We demonstrate feasibility of this approach in the context of FPGA-based
medical image registration; however, it may be adapted to a wide range of signal processing
applications.
