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  • 标题:Component Monitoring System hardware architecture - technical
  • 作者:Christoph Westerteicher
  • 期刊名称:Hewlett-Packard Journal
  • 印刷版ISSN:0018-1153
  • 出版年度:1991
  • 卷号:Oct 1991
  • 出版社:Hewlett-Packard Co.

Component Monitoring System hardware architecture - technical

Christoph Westerteicher

Up to 23 function cards residing in a computer module communicate over a message passing bus. The computer module, the display, and the parameter modules that measure vital signs can be in separate locations as needed by the application.

The prime objective in the development of the HP Component Monitoring System was to build a patient monitor that would adapt optimally to the majority of clinical applications, now and in the foreseeable future. To the R&D team, this meant modularity, but not just in the sense of being able to mix and match parameters. The goal of this project was to carry the idea of configurability a quantum leap into the future.

Major Parts

The Component Monitoring System can be segmented into three parts Mg. 1):

* The rack and parameter modules

* The computer module

* The display.

This segmentation is not just a theoretical way of looking at the Component Monitoring System. The system can actually be separated into these components. It is therefore possible to place the parameter modules close to the patient and position the display within sight of the anesthesiologist, while the computer module can be totally removed from the vicinity of the patient.

Computer Module

The computer module incorporates all the processing power, the interfaces to other devices and networks, the display controllers, and drivers for human interface equipment.

These functional elements have been broken into their generic components, and then designed and implemented as individual function cards. The processing power, for example, is provided by an application dependent number of CPU cards, working together as a loosely coupled multiprocessor system. Based upon a 16/32-bit microprocessor, each CPU card is an independent subsystem, including a large amount of static memory, boot EPROM, and an interface chip for the computer module's internal bus, the message passing bus (Fig. 2). The ability to work as a self-contained, independent entity was the smallest common denominator we wanted to apply to our computer module building blocks. Because of this concept, processing power, interface cards, or display controllers can be added depending upon the customer's application. New function cards can be added by plugging them into the computer module without interfering with the existing configuration.

Local resources of a function card, like static memory or EPROM, can be extended by adding a battery-buffered static RAM card and an EPROM card. They connect to a local extension bus, which is routed on the same connector as the message passing bus, thus allowing an identical design for all slots on the backplane.

At first release of the Component Monitoring System, there are 11 function cards. The spectrum includes the above-mentioned processor and memory cards, interface cards to RS-232 devices and HP's medical signal distribution network (SDN), high-resolution monochrome and color display controllers, and other cards.

Each function had to fit onto the standard function card. To make this possible, several application-specific integrated circuits (ASICs) provide high performance in a minimum of card space. Surface mount technology allows components in very small packages to be mounted close together directly on the surface of a function card. The benefits of these new technologies are highly automated production processes, reduced part count, and increased reliability.

Message Passing Bus

The message passing bus represents the backbone of the Component Monitoring System. It is by virtue of this solution that it was feasible to implement modularity in such an extensive fashion.

The message passing bus is based on a message broadcasting system, in which one bus participant transmits information without having to specify the address of the receiving device. Instead, every message is classified by a header, indicating the content of the message. A bus participant interested in a specific class of messages writes the header of the information and a priority into the signature RAM of its message passing bus interface. When the header of the message on the bus and the header in the signature RAM match, the receiving card's message passing bus interface automatically loads that message into its FIFO buffer. Depending on the priority assigned, the incoming information is pushed into either the high-priority or the low-priority FIFO, thereby preprocessing data for the CPU. Comparing headers and moving information into and out of the FIFOs is controlled by the message passing bus interface chip with no interaction from the data processing device. Fig. 3 is a block diagram of this chip.

The major advantages of this concept are threefold. First, messages only need to be sent once, regardless of the number of bus participants interested in the information. This guarantees that bus bandwidth is not used merely to duplicate messages going to multiple receivers. Second, the absolute bus bandwidth is defined by the speed of the message passing bus interface chip. The chip controls the transmit and receive FIFOs and compares headers without support from the data processing device. In essence, the message passing bus chip is a buffer between a high-speed bus and data processing logic working at varying speeds, which should not be interrupted by every bus activity if it is to function effectively.

The third major advantage of the message passing concept is that new system cards can be added to a monitor, and as long as they know the algorithm for allocating headers, they can actively participate on the message passing bus. The bus has a decentralized arbitration algorithm, which determines how each participant accesses the bus. Each interface chip incorporates arbitration circuitry based on a round-robin-like system, assigning the bus on a rotating priority basis. If the current bus master is level n, priority n - I will be given to the next interface requesting the bus, and so on sequentially. This guarantees that the bus is shared equally among all of the function cards and is dynamically distributed every time a message is sent.

The message passing bus chip was designed as an ASIC, using a silicon compiler tool to develop and simulate the circuit's functionality.

Central Plane and Power Concept

In the center of the computer module chassis is a 23-connector motherboard with press-fit sockets mounted on both the front and the rear. The message passing bus is routed to all 23 slots on this central plane Fig. 4). Since all of the function cards are mechanically identical in size, any card can be inserted into any slot of the central plane, thus making possible a wide range of configurations. The only exemption is the dc-to-dc converter, which always is located in the same slot. This one card provides the power for the computer module, and is sourced with 60V directly from the Component Monitoring System display Mg. 5).

This somewhat uncommon power architecture was necessary to comply with the stringent leakage current limits imposed on medical equipment. If the Component Monitoring System were to incorporate separate power supplies in the display and the computer module, the leakage currents of both to ground would be added together, making it very difficult to reduce this value to below 100 [mu]A.

The second reason for taking the power supply out of the computer module was the need to reduce the amount of heat dissipated in this small box to a minimum, so as not to jeopardize reliability. We therefore decided to have only one power supply for the entire Component Monitoring System, and to house this in the display.

The Display

Customers can choose either a monochrome or color 14-inch display Mg. 6).These are high-resolution, noninterlacing, high-contrast displays designed and built specifically for medical applications.

To provide outstanding waveform quality, the displays and the display controllers have a very high horizontal resolution of 2048 pixels. At this pixel spacing the human eye can no longer resolve the individual dots, so the curves appear very smooth.

The displays also incorporate the Component Monitoring System control panel, located beneath the screen. This control panel is the main means of interacting with the monitor. It consists of a membrane keyboard, LED indicators, and the human interface board, which is an HP-HIL device looped through to the computer module.

Summary

The hardware architecture has proven to be one of the steps on the ladder to success of the Component Monitoring System. With the advent of this new monitor, production has been automated and streamlined to an extent unheard of for such a complex device as a patient monitor. The parts standardization effort has resulted in a mere 300 different items for the entire system. Our customers can now have a state-of-the-art monitoring system that they can configure to their specific needs, and at the same time be assured that their system has been designed to stay abreast with technological or application changes for many years to come.

Acknowledgments

For their outstanding results, for their endurance, and for being a most enjoyable team to work with, our thanks go to all members of the Component Monitoring System hardware group.

COPYRIGHT 1991 Hewlett Packard Company
COPYRIGHT 2004 Gale Group

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